The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 06, 2018

Filed:

Oct. 25, 2017
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;

Inventor:

Yong Jun Lee, Hwaseong-si, KR;

Assignee:

SAMSUNG ELECTRONICS CO., LTD., Suwon-si, Gyeonggi-Do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/00 (2006.01); G11C 11/16 (2006.01); G11C 7/22 (2006.01); G11C 7/12 (2006.01); G11C 7/10 (2006.01); G11C 11/56 (2006.01); G11C 13/00 (2006.01);
U.S. Cl.
CPC ...
G11C 11/1675 (2013.01); G11C 7/1072 (2013.01); G11C 7/1078 (2013.01); G11C 7/1096 (2013.01); G11C 7/12 (2013.01); G11C 7/222 (2013.01); G11C 11/5678 (2013.01); G11C 13/0023 (2013.01); G11C 13/0028 (2013.01); G11C 13/0069 (2013.01);
Abstract

A nonvolatile memory device includes memory banks and write block circuits. Each of the memory banks includes an array of memory cells. Each of the memory cells is disposed in a region of the memory banks in which bit lines and word lines intersect. The write block circuits are connected to the memory banks. Each of the write block circuits includes write drivers, that are each connected to the bit lines. The write block circuits provide a write current of the memory cells to the bit lines. A total number of write block circuits is used to determine the number of memory banks that are simultaneously provided with a write command from a host. A total number of write drivers that are activated is based on a predetermined reference value.


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