The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 06, 2018
Filed:
Sep. 12, 2016
Applicant:
Kabushiki Kaisha Toshiba, Tokyo, JP;
Inventors:
Susumu Takeda, Kanagawa, JP;
Hiroki Noguchi, Kanagawa, JP;
Kazutaka Ikegami, Kanagawa, JP;
Shinobu Fujita, Tokyo, JP;
Assignee:
Kabushiki Kaisha Toshiba, Tokyo, JP;
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/00 (2006.01); G06F 11/10 (2006.01); G06F 12/16 (2006.01); G06F 12/0811 (2016.01); G06F 12/0893 (2016.01); G06F 3/06 (2006.01); H03M 13/29 (2006.01); G06F 12/123 (2016.01);
U.S. Cl.
CPC ...
G06F 11/1064 (2013.01); G06F 3/064 (2013.01); G06F 3/0619 (2013.01); G06F 3/0679 (2013.01); G06F 12/0811 (2013.01); G06F 12/0893 (2013.01); G06F 12/16 (2013.01); H03M 13/2906 (2013.01); G06F 12/123 (2013.01); G06F 2212/1008 (2013.01); G06F 2212/1024 (2013.01); G06F 2212/1032 (2013.01); G06F 2212/283 (2013.01);
Abstract
A cache memory includes cache memory circuitry that is accessible per cache line and a redundant-code storage that stores one or more numbers of first redundant codes to be used for error correction of cache line data stored in the cache memory circuitry per cache line and one or more numbers of second redundant codes to be used for error detection of a part of the cache line data.