The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 06, 2018

Filed:

Apr. 21, 2016
Applicant:

Shenzhen China Star Optoelectronics Technology Co., Ltd., Shenzhen, CN;

Inventor:

Shimin Ge, Shenzhen, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/12 (2006.01); G02F 1/1343 (2006.01); G02F 1/136 (2006.01); H01L 21/77 (2017.01); H01L 27/12 (2006.01); G02F 1/1362 (2006.01); G02F 1/1368 (2006.01); H01L 21/425 (2006.01); H01L 29/786 (2006.01); H01L 27/32 (2006.01);
U.S. Cl.
CPC ...
G02F 1/13439 (2013.01); G02F 1/136 (2013.01); G02F 1/1368 (2013.01); G02F 1/136209 (2013.01); G02F 1/136286 (2013.01); H01L 21/425 (2013.01); H01L 21/77 (2013.01); H01L 27/12 (2013.01); H01L 27/124 (2013.01); H01L 27/127 (2013.01); H01L 27/1225 (2013.01); H01L 27/1288 (2013.01); H01L 29/78633 (2013.01); H01L 29/78693 (2013.01); G02F 1/134363 (2013.01); G02F 2001/13685 (2013.01); G02F 2001/134372 (2013.01); G02F 2001/136236 (2013.01); G02F 2001/136295 (2013.01); G02F 2202/10 (2013.01); H01L 27/3248 (2013.01);
Abstract

The invention provides an array substrate and a manufacturing method thereof. The array substrate comprises a substrate body, a common electrode, a light shield layer, an insulating layer, a polycrystalline silicon layer, a gate insulating layer, a gate electrode, a medium layer and a source-drain electrode. The array substrate is characterized in that the common electrode is formed on the substrate body, the light shield layer is positioned on the common electrode, the insulating layer is positioned on the light shield layer and the common electrode, and the gate electrode is connected with the common electrode through a through hole. The manufacturing method of the array substrate includes the steps: forming the patterned common electrode and the patterned light shield layer by one-time photomask and multiple etching after a transparent conducting layer and a first metal layer are formed on the substrate body, and saving one photomask; forming an electrode through hole communicated with the common electrode and the gate electrode after photomask and etching, and subsequently manufacturing the medium layer and the source-drain electrode. The whole process has seven photomasks, machining process steps of an array substrate tube are simplified, and the manufacturing cost of the array substrate is reduced.


Find Patent Forward Citations

Loading…