The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 06, 2018

Filed:

May. 21, 2018
Applicant:

Inphi Corporation, Santa Clara, CA (US);

Inventors:

Liang Ding, Singapore, SG;

Radhakrishnan L. Nagarajan, Santa Clara, CA (US);

Roberto Coccioli, Westlake Village, CA (US);

Assignee:

INPHI CORPORATION, Santa Clara, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G02B 6/42 (2006.01); G02B 6/13 (2006.01); G02B 6/30 (2006.01); H01L 21/56 (2006.01); H01L 21/768 (2006.01); H01L 23/00 (2006.01); H01L 25/16 (2006.01); G02B 6/12 (2006.01);
U.S. Cl.
CPC ...
G02B 6/428 (2013.01); G02B 6/13 (2013.01); G02B 6/30 (2013.01); G02B 6/4232 (2013.01); G02B 6/4283 (2013.01); G02B 6/4295 (2013.01); H01L 21/565 (2013.01); H01L 21/76877 (2013.01); H01L 24/11 (2013.01); H01L 24/81 (2013.01); H01L 25/167 (2013.01); G02B 2006/12121 (2013.01); G02B 2006/12142 (2013.01); H01L 2224/11334 (2013.01); H01L 2224/12105 (2013.01); H01L 2224/13014 (2013.01); H01L 2224/13016 (2013.01); H01L 2224/16146 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/81191 (2013.01); H01L 2924/06 (2013.01); H01L 2924/10253 (2013.01); H01L 2924/1205 (2013.01); H01L 2924/12042 (2013.01); H01L 2924/12043 (2013.01); H01L 2924/141 (2013.01); H01L 2924/1426 (2013.01); H01L 2924/1433 (2013.01);
Abstract

An optical transceiver by hybrid multichip integration. The optical transceiver includes a PCB with a plurality of prefabricated surface bonding sites. A first chip includes a FOWLP package of multiple electronics devices embedded in a dielectric molding layer overlying a dielectric redistribution layer is disposed on the PCB by respectively bonding a plurality of conductor balls between the dielectric redistribution layer and the plurality of prefabricated surface bonding sites while exposing soldering material filled in multiple through-mold vias (TMVs) in the dielectric molding layer. The optical transceiver further includes a second chip configured as a Sipho die comprising photonics devices embedded in a SOI wafer substantially free from any electronics device process. The second chip is stacked over the first chip with multiple conductor bumps being bonded respectively to the soldering material in the multiple TMVs.


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