The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 30, 2018
Filed:
Dec. 28, 2017
Renesas Electronics Corporation, Tokyo, JP;
Shunichi Kaeriyama, Tokyo, JP;
RENESAS ELECTRONICS CORPORATION, Tokyo, JP;
Abstract
An object of the invention is to improve precision of current detection in a switching system having plural switching circuits. A first PWM timing generation circuit generates an edge timing of a PWM signal by using a comparison value and a count value and drives a first switching circuit. A second PWM timing generation circuit generates an edge timing of a PWM signal of plural phases by using a comparison value and a count value and drives a second switching circuit. One of the switching circuits is an inverter circuit of a common shunt type in which a shunt resistor is provided commonly for plural phases. One of the PWM timing generation circuits shifts the generated edge timing so that an interval between an edge timing of one of the circuits and an AD conversion timing of the other becomes equal to or larger than a predetermined reference value.