The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 30, 2018

Filed:

Nov. 29, 2016
Applicants:

Hyundai Motor Company, Seoul, KR;

Hyundai Autron Co., Ltd., Seongnam-si, Gyeonggi-do, KR;

Inventors:

Dae Hwan Chun, Gwangmyeong-si, KR;

Youngkyun Jung, Seoul, KR;

JongSeok Lee, Suwon-si, KR;

Youngjoon Kim, Suwon-si, KR;

Taeyeop Kim, Seoul, KR;

Hyuk Woo, Incheon, KR;

Assignees:

HYUNDAI MOTOR COMPANY, Seoul, KR;

HYUNDAI AUTRON CO., LTD., Seongnam-si, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/94 (2006.01); H01L 29/16 (2006.01); H01L 21/02 (2006.01); H01L 21/306 (2006.01); H01L 29/423 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01);
U.S. Cl.
CPC ...
H01L 29/1608 (2013.01); H01L 21/02529 (2013.01); H01L 21/30604 (2013.01); H01L 29/4236 (2013.01); H01L 29/66666 (2013.01); H01L 29/7827 (2013.01);
Abstract

A semiconductor device includes: an n− type layer disposed on a first surface of an n+ type silicon carbide substrate; a first trench formed in the n− type layer; a p type region disposed on both side surfaces of the first trench; an n+ type region disposed on both side surfaces of the first trench and disposed on the n− type layer and the p type region; a gate insulating layer disposed inside the first trench; a gate electrode disposed on the gate insulating layer; an oxide layer disposed on the gate electrode; a source electrode disposed on the oxide layer and the n+ region; and a drain electrode disposed on the second surface of the n+ type silicon carbide substrate, wherein a first channel as an accumulation layer channel and a second channel as an inversion layer channel are disposed in both side surfaces of the first trench, and the first channel and the second channel are disposed to be adjacent in a horizontal direction for the first surface of the n+ type silicon carbide substrate.


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