The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 30, 2018

Filed:

Jun. 12, 2016
Applicant:

Wuhan China Star Optoelectronics Technology Co., Ltd., Wuhan, Hubei, CN;

Inventor:

Zijian Li, Guangdong, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/12 (2006.01); H01L 21/77 (2017.01); H01L 21/311 (2006.01); H01L 29/786 (2006.01); G02F 1/1368 (2006.01);
U.S. Cl.
CPC ...
H01L 27/1288 (2013.01); H01L 21/31116 (2013.01); H01L 21/77 (2013.01); H01L 27/12 (2013.01); H01L 27/124 (2013.01); H01L 27/1255 (2013.01); H01L 29/78618 (2013.01); G02F 1/1368 (2013.01);
Abstract

The present disclosure relates to an array substrate and the manufacturing method thereof. The manufacturing method includes depositing a conductive layer on a substrate, forming three poles of at least one thin film transistor (TFT), a first signal line, and a second signal line by etching the conductive layer via a first mask, The method also includes depositing an intermediate layer in sequence, forming a first connecting bridge connecting a first portion and a second portion by etching the intermediate layer via a second mask, depositing a conductive electrode, and forming at least one pixel electrode and a connecting line between the first portion and the second portion by etching the conductive electrode via a third mask. In this way, the time of the manufacturing process of the array substrates may be reduced such that the manufacturing cost may be decreased.


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