The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 30, 2018

Filed:

Sep. 13, 2017
Applicant:

Toshiba Memory Corporation, Minato-ku, JP;

Inventor:

Takeshi Kusakabe, Yokkaichi, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 27/115 (2017.01); H01L 23/544 (2006.01); H01L 27/1157 (2017.01); H01L 27/11565 (2017.01); H01L 27/11582 (2017.01);
U.S. Cl.
CPC ...
H01L 23/562 (2013.01); H01L 23/544 (2013.01); H01L 27/1157 (2013.01); H01L 27/11565 (2013.01); H01L 27/11582 (2013.01); H01L 2223/54426 (2013.01);
Abstract

According to an embodiment, a semiconductor memory device includes a substrate, a first stacked body, a columnar part, a second insulating film, and a second stacked body. The first stacked body is provided in a first region on the substrate. The second insulating film is provided in a second region on the substrate, and has a first thickness in a stacking direction of the first stacked body. The second stacked body is provided on the second insulating film. The second stacked body includes a first film and a third insulating film stacked alternately on one another. The uppermost first film in the first films of the second stacked body is located at a first distance in the stacking direction from the upper surface of the substrate. The first thickness is a thickness not less than 30 percent of the first distance.


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