The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 30, 2018

Filed:

Jun. 08, 2017
Applicant:

Rockwell Collins, Inc., Cedar Rapids, IA (US);

Inventors:

Jason R. Owen, Marion, IA (US);

Matthew P. Corbett, Mount Vernon, IA (US);

Nicholas H. Bloom, Marion, IA (US);

Assignee:

Rockwell Collins, Inc., Cedar Rapids, IA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/16 (2006.01); G06F 13/362 (2006.01); G06F 9/455 (2018.01); G06F 9/54 (2006.01); G06F 3/06 (2006.01); G06F 17/30 (2006.01); G06F 11/14 (2006.01);
U.S. Cl.
CPC ...
G06F 13/3625 (2013.01); G06F 3/065 (2013.01); G06F 3/067 (2013.01); G06F 3/0619 (2013.01); G06F 9/45558 (2013.01); G06F 9/546 (2013.01); G06F 11/1604 (2013.01); G06F 17/30581 (2013.01); G06F 11/14 (2013.01); G06F 11/1484 (2013.01); G06F 11/16 (2013.01); G06F 11/1658 (2013.01); G06F 2009/45579 (2013.01);
Abstract

A system and related method for I/O synchronization in a high integrity multi-core processing environment (MCPE) incorporates logical computing units (LCU) of two or more homogeneous processing cores, each core running a guest operating system (GOS) and user applications such that the homogeneous cores concurrently generate the same output data (which the GOS loads to an I/O synchronization engine (IOSE)) or receive the same output data from the IOSE. The IOSE verifies data integrity by comparing the concurrently received datasets and selects a verified dataset for routing to other cores or externally to the MCPE. The IOSE receives and atomically replicates input data for synchronous transfer to, and consumption by, the user applications running on the cores of the LCU.


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