The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 30, 2018

Filed:

Jan. 14, 2014
Applicant:

Nvidia Corporation, Santa Clara, CA (US);

Inventors:

Steven E. Molnar, Chapel Hill, NC (US);

Jay Kishora Gupta, Bangalore, IN;

James Leroy Deming, Madison, AL (US);

Samuel Hammond Duncan, Arlington, MA (US);

Jeffrey Smith, Santa Clara, CA (US);

Assignee:

NVIDIA CORPORATION, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/1027 (2016.01); G06F 12/1009 (2016.01);
U.S. Cl.
CPC ...
G06F 12/1027 (2013.01); G06F 12/1009 (2013.01); G06F 2212/1016 (2013.01); G06F 2212/651 (2013.01); G06F 2212/682 (2013.01);
Abstract

A system and method are provided for implementing multi-stage translation of virtual addresses. The method includes the steps of receiving, at a first memory management unit, a memory request including a virtual address in a first address space, translating the virtual address to generate a second virtual address in a second address space, and transmitting a modified memory request including the second virtual address to a second memory management unit. The second memory management unit is configured to translate the second virtual address to generate a physical address in a third address space. The physical address is associated with a location in a memory.


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