The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 30, 2018
Filed:
Sep. 16, 2014
Applicant:
Sandisk Technologies Llc, Plano, TX (US);
Inventors:
Narendhiran Chinnaanangur Ravimohan, Karnataka, IN;
Muralitharan Jayaraman, Karnataka, IN;
Abhijeet Manohar, Karnataka, IN;
Alan Bennett, Edinburgh, GB;
Assignee:
SanDisk Technologies LLC, Plano, TX (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 3/06 (2006.01); G06F 12/0804 (2016.01); G06F 12/0866 (2016.01); G06F 12/02 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0617 (2013.01); G06F 3/064 (2013.01); G06F 3/0688 (2013.01); G06F 12/0246 (2013.01); G06F 12/0804 (2013.01); G06F 12/0866 (2013.01); G06F 2212/7201 (2013.01); G06F 2212/7204 (2013.01); G06F 2212/7208 (2013.01); G06F 2212/7211 (2013.01);
Abstract
In a multi-plane non-volatile memory, good blocks of different planes are linked for parallel operation for storing long host writes. Where bad blocks in one or more planes result in unlinked blocks, the unlinked blocks are configured for individual operation to store short host writes and/or memory system management data. Unlinked blocks may be configured as Single Level Cell (SLC) blocks while linked blocks may be configured as SLC blocks or Multi Level Cell (MLC) blocks.