The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 23, 2018

Filed:

Nov. 11, 2014
Applicant:

Finisar Corporation, Sunnyvale, CA (US);

Inventors:

Henry Meyer Daghighian, Menlo Park, CA (US);

Steven C. Bird, San Jose, CA (US);

YongShan Zhang, San Jose, CA (US);

Assignee:

FINISAR CORPORATION, Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01K 3/10 (2006.01); H05K 3/40 (2006.01); H05K 3/00 (2006.01); H05K 1/02 (2006.01);
U.S. Cl.
CPC ...
H05K 3/4046 (2013.01); H05K 1/0245 (2013.01); H05K 1/0251 (2013.01); H05K 3/0094 (2013.01); H05K 2201/0959 (2013.01); H05K 2201/09636 (2013.01); H05K 2201/10242 (2013.01); Y10T 29/49165 (2015.01);
Abstract

Some embodiments relate to micro vias in printed circuit boards (PCBs). In an example, a PCB may include a PCB substrate and a micro via. The micro via may extend between opposing surfaces of the PCB substrate and may have a diameter less than or equal to about 100 microns. In another example, a method of forming micro vias in a PCB may include forming a through hole in a PCB substrate of the PCB. The method may also include positioning a pillar that is electrically conductive within the through hole. The method may also include backfilling the through hole around the pillar with an epoxy backfill.


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