The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 23, 2018
Filed:
Feb. 22, 2013
Applicant:
Soitec, Crolles, FR;
Inventor:
Richard Ferrant, Esquibien, FR;
Assignee:
SOITEC, Bernin, FR;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 19/177 (2006.01); H03K 19/003 (2006.01); H03K 19/00 (2006.01);
U.S. Cl.
CPC ...
H03K 19/17728 (2013.01); H03K 19/0013 (2013.01); H03K 19/00315 (2013.01); H03K 19/17792 (2013.01); H01L 2924/0002 (2013.01);
Abstract
The present invention relates to a look-up table architecture and to an FPGA comprising the same. The look-up table architecture comprises a registers group comprising a plurality of registers configured to issue register signals, and a programmable logic comprising a plurality of pass gates configured to be controlled at least by the register signals, the registers group and the programmable logic forming a look-up table, wherein the pass gates are placed in a single direction.