The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 23, 2018

Filed:

Jun. 05, 2017
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventor:

Mustafa Badaroglu, Kessel-Lo, BE;

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/118 (2006.01);
U.S. Cl.
CPC ...
H01L 27/11807 (2013.01); H01L 2027/11824 (2013.01);
Abstract

Selectively recessing trench isolation in three-dimensional (3D) transistors to vary channel structure exposures from trench isolation to control drive strength is disclosed. The ability to vary the exposures of channel structures in 3D transistors from trench isolation allows the drive strengths of the 3D transistors to be varied. Varying the drive strengths of 3D transistors may be advantageous in certain circuit applications to reduce power consumption and/or control drive strength ratios between transistors, as examples. In this regard, in exemplary aspects disclosed herein, during the fabrication of 3D transistors, a trench isolation material is disposed adjacent to channel structures formed from a substrate. The amount of trench isolation material disposed adjacent to each channel structure determines the amount of channel structure surface area exposed to a gate. The amount of channel structure surface area of the 3D transistor exposed to the gate affects the drive strength of the 3D transistor.


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