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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10109344 B1

PDFFull Text
Date of Patent:
Oct. 23, 2018

Filed:

Dec. 23, 2016

Semiconductor memory devices with banks with different numbers of memory cells coupled to their bit-lines and memory systems including the same

Applicant:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;

Inventor:

Sang-Kyu Kang, Anyang-si, KR;

Assignee:

SAMSUNG ELECTRONICS CO., LTD., Suwon-si, Gyeonggi-Do, KR;

Attorney:

F. Chau & Associates, LLC

Primary Examiner:

Vanthu Nguyen

Assistant Examiner:

Jerome Leboeuf

Int. Cl.
CPC ...
G11C 11/4096 (2006.01); G11C 5/02 (2006.01); G11C 7/10 (2006.01); G11C 11/408 (2006.01); G11C 11/4094 (2006.01); G11C 8/12 (2006.01); G11C 11/4074 (2006.01); G11C 11/4091 (2006.01);
U.S. Cl.
CPC ...
G11C 11/4096 (2013.01); G11C 5/025 (2013.01); G11C 7/1072 (2013.01); G11C 8/12 (2013.01); G11C 11/4074 (2013.01); G11C 11/4085 (2013.01); G11C 11/4087 (2013.01); G11C 11/4094 (2013.01); G11C 11/4091 (2013.01);
Abstract

A semiconductor memory device includes a memory cell array including a plurality of bank arrays and a control logic circuit. The control logic circuit controls access to the memory cell array in response to a command and an address. A first number of memory cells are coupled to a bit-line of a first bank array of the plurality of bank arrays, a second number of memory cells are coupled to a bit-line of a second bank array of the plurality of bank arrays and the first number is different from the second number.

Find Patent Forward Citations

Kang, Sang-Kyu. (2018). Semiconductor memory devices with banks with different numbers of memory cells coupled to their bit-lines and memory systems including the same (U.S. Patent No. 10109344). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10109344

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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