The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 23, 2018
Filed:
Dec. 15, 2017
Murata Manufacturing Co., Ltd., Nagaokakyo-shi, Kyoto-fu, JP;
Noboru Kato, Nagaokakyo, JP;
Kunihiro Komaki, Nagaokakyo, JP;
MURATA MANUFACTURING CO., LTD., Kyoto, JP;
Abstract
An RFIC chip includes a first input/output terminal and a second input/output terminal and is built into a multilayer substrate. A power feeding circuit includes coil conductors and is built into the multilayer substrate. A first coil conductor includes a first coil end connected to the first input/output terminal, and a second coil conductor includes a second coil end connected to the second input/output terminal. First and second terminal electrodes are connected to one end of the first coil conductor and one end of the second coil conductor, respectively. A first coil portion is disposed in a section extending from the first coil end to the first position and a second coil portion is disposed in a section extending from the second coil end to the second position. The RFIC chip is interposed between the first coil portion and the second coil portion in a planar view of the multilayer substrate.