The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 23, 2018

Filed:

Jun. 06, 2016
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Saim Ahmad Qidwai, Allen, TX (US);

Peter Wongeun Chung, Frisco, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/00 (2006.01); G06F 11/20 (2006.01); G11C 29/52 (2006.01); G11C 29/04 (2006.01); G06F 11/07 (2006.01); G11C 11/22 (2006.01); G06F 11/10 (2006.01);
U.S. Cl.
CPC ...
G06F 11/2094 (2013.01); G06F 11/0727 (2013.01); G06F 11/1048 (2013.01); G11C 11/2277 (2013.01); G11C 29/04 (2013.01); G11C 29/52 (2013.01);
Abstract

A memory, such as a non-volatile ferroelectric memory, including both error correction coding (ECC) capability and redundant memory cells. During the system operating life of the memory, upon ECC decoding determining that a symbol read from the memory array at an address cannot be corrected, the failed memory cells are identified, and redundancy enabled to replace those failed cells if available. Redundant columns may be partitioned by row address, to allow the same column of redundant cells to replace bits in different columns for different portions of the memory. Dynamic redundancy is provided by the disclosed embodiments, extending the reliability of the memory during its system operating life.


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