The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 23, 2018

Filed:

Feb. 19, 2016
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Guy Lynn Guthrie, Austin, TX (US);

Naresh Nayar, Rochester, MN (US);

Geraint North, Manchester, GB;

Hugh Shen, Round Rock, TX (US);

William Starke, Round Rock, TX (US);

Phillip Williams, Leander, TX (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 11/14 (2006.01); G06F 12/0806 (2016.01); G06F 9/455 (2018.01); G06F 12/0875 (2016.01); G06F 12/109 (2016.01); G06F 3/06 (2006.01); G06F 12/0804 (2016.01); G06F 12/0891 (2016.01); G06F 12/12 (2016.01); G06F 11/20 (2006.01);
U.S. Cl.
CPC ...
G06F 11/1451 (2013.01); G06F 3/065 (2013.01); G06F 3/0619 (2013.01); G06F 3/0652 (2013.01); G06F 3/0685 (2013.01); G06F 9/45558 (2013.01); G06F 11/1438 (2013.01); G06F 11/1484 (2013.01); G06F 11/2097 (2013.01); G06F 12/0804 (2013.01); G06F 12/0806 (2013.01); G06F 12/0875 (2013.01); G06F 12/0891 (2013.01); G06F 12/109 (2013.01); G06F 12/12 (2013.01); G06F 11/2023 (2013.01); G06F 2009/45583 (2013.01); G06F 2009/45591 (2013.01); G06F 2201/885 (2013.01); G06F 2212/1032 (2013.01); G06F 2212/152 (2013.01); G06F 2212/281 (2013.01); G06F 2212/313 (2013.01); G06F 2212/60 (2013.01); G06F 2212/608 (2013.01);
Abstract

A computer system comprises a processor unit arranged to run a hypervisor running one or more virtual machines; a cache connected to the processor unit and comprising a plurality of cache rows, each cache row comprising a memory address, a cache line and an image modification flag; and a memory connected to the cache and arranged to store an image of at least one virtual machine. The processor unit is arranged to define a log in the memory and the cache further comprises a cache controller arranged to set the image modification flag for a cache line modified by a virtual machine being backed up, but not for a cache line modified by the hypervisor operating in privilege mode; periodically check the image modification flags; and write only the memory address of the flagged cache rows in the defined log.


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