The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 16, 2018

Filed:

Nov. 20, 2017
Applicant:

National Technology & Engineering Solutions of Sandia, Llc, Albuquerque, NM (US);

Inventors:

Thomas M. Gurrieri, Albuquerque, NM (US);

Jason R. Hamlet, Albuquerque, NM (US);

Todd M. Bauer, Albuquerque, NM (US);

Ryan Helinski, Albuquerque, NM (US);

Lyndon G. Pierson, Albuquerque, NM (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/003 (2006.01); H03K 19/177 (2006.01);
U.S. Cl.
CPC ...
H03K 19/00315 (2013.01); H03K 19/17768 (2013.01);
Abstract

An integrated circuit (IC) based physically unclonable function (PUF) that comprises a common source amplifier for generating PUF output voltages, a unity gain, negative feedback operational amplifier for generating bias voltages, a voltage regulator and a bit exclusion circuit that excludes unstable PUF bits. Compensation circuitry built into the IC-PUF provides a high power supply rejection ratio and enables highly reliable operation of the IC-PUF across varying input voltages and operating temperatures. The IC-PUF generates a uniformly random output bit stream by taking advantage of process variations that are inherent to the fabrication of (metal-oxide semiconductor) MOS transistors.


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