The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 16, 2018
Filed:
Nov. 28, 2016
Applicant:
Stmicroelectronics (Rousset) Sas, Rousset, FR;
Inventors:
Albert Martinez, Bouc Bel Air, FR;
Michel Agoyan, Marselle, FR;
Assignee:
STMicroelectronics (Rousset) SAS, Rousset, FR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 17/00 (2006.01); H03K 5/159 (2006.01); H03K 19/003 (2006.01); G06F 7/58 (2006.01); H03K 3/84 (2006.01); H03K 19/173 (2006.01);
U.S. Cl.
CPC ...
H03K 17/005 (2013.01); G06F 7/58 (2013.01); H03K 3/84 (2013.01); H03K 5/159 (2013.01); H03K 19/003 (2013.01); H03K 19/1737 (2013.01);
Abstract
A logic two-to-one multiplexer includes: two input terminals; one output terminal; a control terminal. Four series-connected two-to-one multiplexers are connected such that a first multiplexer has its inputs connected to the input terminals, a last multiplexer has its output connected to the output terminal, and the other multiplexers have their respective inputs interconnected to the output of the previous multiplexer in the series association. Half of the multiplexers are controlled in reverse with respect to the other half of the multiplexers.