Phase, amplitude and gate-bias optimizer for doherty amplifier

Abstract

Systems, methods and instrumentalities are disclosed for Doherty amplifier optimization. Amplifier configurability and control therefore may be integrated. Amplitude alignment, phase alignment, amplifier gate biasing, driver gate biasing and temperature compensation for N paths in Doherty configurations may be integrated, for example, using a programmable LUT storing control bit patterns. Configurability may comprise reconfigurability between asymmetric power split ratios, between symmetric and asymmetric relationships and between classic and inverted phase relationships, permitting path reconfigurability for higher or lower power and leading or lagging phase. Multiple versions providing more or less configurability and/or control range with more or less insertion loss, such as design and production versions, may be pin compatible, e.g., to reduce time and expense for R&D and production transition. Integration of configurability and/or control may reduce complexity in design, development, control, optimization, production and application, e.g., by eliminating interfaces, mismatches or excessive capacitance between discrete chips.