The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 16, 2018
Filed:
Feb. 26, 2015
Applicant:
Altera Corporation, San Jose, CA (US);
Inventors:
Teik Wah Lim, Bayan Lepas, MY;
Ashraf W. Lotfi, Bridgewater, NJ (US);
Choong Kit Wong, Bayan Lepas, MY;
John Weld, Ledgewood, NJ (US);
Assignee:
Altera Corporation, San Jose, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02M 3/158 (2006.01); H01L 25/065 (2006.01); H01L 23/04 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H02M 3/158 (2013.01); H01L 23/04 (2013.01); H01L 25/0652 (2013.01); H01L 24/05 (2013.01); H01L 24/13 (2013.01); H01L 24/16 (2013.01); H01L 24/29 (2013.01); H01L 24/32 (2013.01); H01L 24/48 (2013.01); H01L 2224/04042 (2013.01); H01L 2224/05554 (2013.01); H01L 2224/131 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/16235 (2013.01); H01L 2224/2919 (2013.01); H01L 2224/32245 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48105 (2013.01); H01L 2224/48227 (2013.01); H01L 2224/48464 (2013.01); H01L 2224/73253 (2013.01); H01L 2924/00014 (2013.01); H01L 2924/15311 (2013.01); H01L 2924/1676 (2013.01); H01L 2924/16724 (2013.01); H01L 2924/16747 (2013.01); H01L 2924/19105 (2013.01);
Abstract
A packaged integrated circuit and method of forming the same. The package integrated circuit includes an integrated circuit formed on a semiconductor die affixed to a surface of a multi-layer substrate, and a switch-mode regulator formed on the semiconductor die (or another semiconductor die) affixed to the surface of the multi-layer substrate. The integrated circuit and the switch-mode regulator are integrated within a package to form the packaged integrated circuit.