The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 16, 2018

Filed:

Apr. 30, 2012
Applicants:

Reinaldo A. Vega, Wappingers Falls, NY (US);

Emre Alptekin, Wappingers Falls, NY (US);

Hung H. Tran, Hopewell Juncton, NY (US);

Xiaobin Yuan, Carmel, NY (US);

Inventors:

Reinaldo A. Vega, Wappingers Falls, NY (US);

Emre Alptekin, Wappingers Falls, NY (US);

Hung H. Tran, Hopewell Juncton, NY (US);

Xiaobin Yuan, Carmel, NY (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/336 (2006.01); H01L 29/06 (2006.01); H01L 29/66 (2006.01); H01L 29/739 (2006.01); H01L 29/78 (2006.01); H01L 21/28 (2006.01);
U.S. Cl.
CPC ...
H01L 29/0684 (2013.01); H01L 21/28114 (2013.01); H01L 29/66356 (2013.01); H01L 29/7391 (2013.01); H01L 29/78 (2013.01); H01L 21/28079 (2013.01); H01L 21/28088 (2013.01); H01L 21/28194 (2013.01);
Abstract

A method of manufacturing a tunnel field effect transistor (TFET) includes forming on a substrate covered by an epitaxially grown source material a dummy gate stack surrounded by sidewall spacers; forming doped source and drain regions followed by forming an inter-layer dielectric surrounding the sidewall spacers; removing the dummy gate stack, etching a self-aligned cavity; epitaxially growing a thin channel region within the self-aligned etch cavity; conformally depositing gate dielectric and metal gate materials within the self-aligned etch cavity; and planarizing the top surface of the replacement metal gate stack to remove the residues of the gate dielectric and metal gate materials.


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