The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 16, 2018

Filed:

May. 30, 2017
Applicants:

Stmicroelectronics (Grenoble 2) Sas, Grenoble, FR;

Stmicroelectronics S.r.l., Agrate Brianza, IT;

Inventors:

Daniele Mangano, San Gregorio di Catania, IT;

Ignazio Antonino Urzi, Voreppe, FR;

Assignees:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/40 (2006.01); G06F 13/14 (2006.01); G06F 15/78 (2006.01);
U.S. Cl.
CPC ...
G06F 13/4027 (2013.01); G06F 13/14 (2013.01); G06F 15/7825 (2013.01); G06F 2213/0038 (2013.01); H04Q 2213/13399 (2013.01); H04Q 2213/399 (2013.01);
Abstract

A system, such as a System-on-Chip includes an interface component or PLUG which generates transactions over an IP block, such as an interconnect serving one or more clients via virtual channels. The client or clients are mapped onto the virtual channels via client/virtual channel mappings. The virtual channels are provided as a first set of virtual channels in the interface component which cooperate with a second set of virtual channels in the IP block. First and second client/virtual channel mappings for the first set of virtual channels and the second set of virtual channels are provided. The first and second client/virtual channel mappings are separately programmable and mutually decoupled from one another.


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