The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 16, 2018

Filed:

Mar. 21, 2016
Applicant:

Xilinx, Inc., San Jose, CA (US);

Inventors:

Ming Ruan, Shanghai, CN;

Fengshou Guo, Shanghai, CN;

Assignee:

XILINX, INC., San Jose, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 7/72 (2006.01);
U.S. Cl.
CPC ...
G06F 7/728 (2013.01); G06F 7/722 (2013.01);
Abstract

A system includes an integrated circuit configured to receive a multiplicand number, a multiplier number, and a modulus at one or more data inputs. The multiplicand number is partitioned into a plurality of multiplicand words. Each multiplicand word has a multiplicand word width. The multiplier number is partitioned into a plurality of multiplier words. Each multiplier word has a multiplier word width different from the multiplicand word width. A plurality of outer loop iterations of an outer loop is performed to iterate through the plurality of the multiplicand words. Each outer loop iteration of the outer loop includes a plurality of inner loop iterations of an inner loop performed to iterate through the plurality of the multiplier words. A Montgomery product of the multiplicand number and the multiplier number with respect to the modulus is determined.


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