The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 16, 2018

Filed:

Oct. 23, 2015
Applicant:

Facebook, Inc., Menlo Park, CA (US);

Inventors:

Baback Elmieh, Palo Alto, CA (US);

Saurabh Palan, Mountain View, CA (US);

Andrew Alexander Robberts, Douro-Dummer, CA;

Alexandre Jais, San Francisco, CA (US);

Assignee:

Facebook, Inc., Menlo Park, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
B29C 67/00 (2017.01); G06F 17/50 (2006.01); B33Y 50/02 (2015.01); B29C 64/386 (2017.01); G05B 19/4099 (2006.01); H05K 3/00 (2006.01);
U.S. Cl.
CPC ...
B29C 67/0088 (2013.01); B29C 64/386 (2017.08); B33Y 50/02 (2014.12); G06F 17/50 (2013.01); G05B 19/4099 (2013.01); G05B 2219/35134 (2013.01); G05B 2219/49007 (2013.01); G05B 2219/49023 (2013.01); H05K 3/0005 (2013.01); Y02T 10/82 (2013.01);
Abstract

Systems, media, and methods for modeling electronic products for 3D printing including providing a library of modules and module interfaces; receiving at least one ruleset; receiving preliminary substrate structure data, the preliminary substrate structure data comprising shape and volume data defining a substrate; providing an interface allowing the user to place one or more modules on the substrate; providing an interface allowing the user to place one or more module interfaces, the module interfaces coupling one or more modules together through the substrate; warning the user where placement of a module or module interface violates the at least one ruleset; generating routing of electrically conductive interconnects between placed module interfaces; and generating a finalized substrate structure model by combining the preliminary substrate structure data with module placement data and interconnect routing data.


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