The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 09, 2018

Filed:

Nov. 12, 2015
Applicant:

Nvidia Corporation, Santa Clara, CA (US);

Inventors:

Eric Tyson, Santa Clara, CA (US);

Stephen D. Glaser, Santa Clara, CA (US);

Mike Osborn, Santa Clara, CA (US);

Mark Hummel, Santa Clara, CA;

Assignee:

Nvidia Corporation, Santa Clara, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03M 13/09 (2006.01); G06F 11/10 (2006.01); H04L 1/00 (2006.01);
U.S. Cl.
CPC ...
H03M 13/091 (2013.01); G06F 11/10 (2013.01); G06F 11/1004 (2013.01); G06F 11/1076 (2013.01); H03M 13/09 (2013.01); H04L 1/0061 (2013.01); H04L 1/0066 (2013.01);
Abstract

A CRC generator, a method for computing a CRC of a data packet, and an electronic system, such as a circuit board, are disclosed herein. In one embodiment the method is for computing the CRC of a data packet to be transmitted on a serial communications link having multiple lanes. In one embodiment, the CRC generator includes: (1) a CRC calculator configured to define a CRC calculation of a data packet in sequential order and perform parallelized computations, according to the sequential order and the multiple lanes, to generate sub-CRC values and (2) combination circuitry configured to combine the sub-CRC values to provide the CRC value for the packet.


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