The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 09, 2018

Filed:

May. 25, 2017
Applicant:

Vidatronic Inc., College Station, TX (US);

Assignee:

Vidatronic, Inc., College Station, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 3/02 (2006.01); H03K 5/08 (2006.01); G11C 5/14 (2006.01); H03K 19/00 (2006.01);
U.S. Cl.
CPC ...
H03K 5/08 (2013.01); G11C 5/14 (2013.01); G11C 5/145 (2013.01); H03K 19/0016 (2013.01); H03K 2217/0036 (2013.01);
Abstract

A novel low power enable circuit is less sensitive to power supply variations while consuming less than 50 nA of supply current. The enable circuit includes a voltage clamp circuit which limits the supply level for a first inverter. The clamp circuit having a first input connected to a supply, a second input connected to chip enable, and a first output. The enable circuit further includes a first inverter having a third input connected to the chip enable, a fourth input connected to the first output of the clamp circuit, and a second output; a second inverter having a fifth input connected to the second output of the first inverter, a sixth input connected to the supply, and a third output; a memory element having a seventh input connected to the third output of the second inverter, an eighth input, and a fourth output; and a comparator having a ninth input connected to the chip enable, a tenth input connected to a reference signal, an eleventh input connected to the fourth output of the memory element, and a fifth output connected to the eighth input of the memory element.


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