The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 09, 2018
Filed:
Dec. 05, 2016
Qorvo Us, Inc., Greensboro, NC (US);
Michael Roberg, Plano, TX (US);
Scott Schafer, Plano, TX (US);
Qorvo US, Inc., Greensboro, NC (US);
Abstract
Monolithic attenuator, limiter, and linearizer circuitry to be integrated with other circuitry on a chip are provided. According to one aspect, a monolithic attenuator and limiter circuit comprises an input terminal, an output terminal, a first resistor having a first terminal coupled to the input terminal and a second terminal coupled to the output terminal, and a second resistor having a first terminal coupled to the first or second terminal of the first resistor and a second terminal coupled to ground. At least the first resistor is a non-linear resistor whose resistance changes as a function of the voltage across the resistor. The monolithic attenuator and limiter circuit may be part of a 'Pi' or 'Tee' topology. According to another aspect, a non-linear shunt resistor coupled to the input of an amplifier circuit can operate to linearize the gain of the amplifier circuit over a range of input levels.