The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 09, 2018

Filed:

Mar. 27, 2017
Applicant:

Sii Semiconductor Corporation, Chiba-shi, Chiba, JP;

Inventors:

Takeshi Morita, Chiba, JP;

Kazuhiro Tsumura, Chiba, JP;

Assignee:

ABLIC INC., Chiba, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/02 (2006.01); H01L 21/8238 (2006.01); H01L 27/092 (2006.01); H01L 29/06 (2006.01); H01L 29/36 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0266 (2013.01); H01L 21/823807 (2013.01); H01L 21/823892 (2013.01); H01L 27/0928 (2013.01); H01L 29/0611 (2013.01); H01L 29/36 (2013.01);
Abstract

In a semiconductor device that uses an N-channel MOS transistor as an electrostatic protection element, the N-channel MOS transistor has a plurality of electric field relaxing areas, three of which have in a longitudinal direction three different impurity concentrations decreasing from an N-type high concentration drain region downward, and three of which have in a lateral direction three different impurity concentrations decreasing from the N-type high concentration drain region toward a channel region. An electric field relaxing area that is in contact with the electric field relaxing areas in the longitudinal direction and with the electric field relaxing areas in the lateral direction has the lowest impurity concentration.


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