The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 09, 2018
Filed:
Oct. 23, 2015
Applicant:
Megachips Corporation, Osaka-shi, JP;
Inventor:
Takahiko Sugahara, Osaka, JP;
Assignee:
MegaChips Corporation, Osaka-shi, JP;
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/00 (2006.01); G11C 29/38 (2006.01); G11C 29/36 (2006.01); G11C 29/18 (2006.01); G11C 29/26 (2006.01);
U.S. Cl.
CPC ...
G11C 29/38 (2013.01); G11C 29/18 (2013.01); G11C 29/26 (2013.01); G11C 29/36 (2013.01);
Abstract
A memory controller performs a reliability test only on a memory array out of the memory array and a random number generator on receipt of a memory test command from a testing device while performing a reliability test only on the random number generator out of the memory array and the random number generator on receipt of a random number test command from the testing device.
Sugahara, Takahiko. (2018). Memory device and method for testing reliability of memory device (U.S. Patent No. 10096379). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10096379
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile