The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 09, 2018

Filed:

Jun. 07, 2016
Applicant:

Huawei Technologies Co., Ltd., Shenzhen, CN;

Inventors:

Junjie Wang, Hangzhou, CN;

Ruiling Wang, Hangzhou, CN;

Yan Ye, Shenzhen, CN;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/00 (2006.01); G06F 11/20 (2006.01); H04L 1/22 (2006.01); G06F 13/38 (2006.01); G06F 11/22 (2006.01); G06F 11/30 (2006.01); G06F 13/42 (2006.01);
U.S. Cl.
CPC ...
G06F 11/2025 (2013.01); G06F 11/2023 (2013.01); G06F 11/2289 (2013.01); G06F 11/3027 (2013.01); G06F 13/385 (2013.01); G06F 13/4282 (2013.01); H04L 1/22 (2013.01);
Abstract

A failover method, apparatus and system to implement fast failover between a primary processor and a secondary processor, where the method includes receiving, by a second device, a transaction processing packet, where the transaction processing packet includes processing information about access of a host to a peripheral component interconnect express (PCIe) device, the processing information is used to describe information required for resuming a transaction when the transaction is interrupted, the second device further stores topology information of the PCIe device, and a driver for the PCIe device is loaded to the second device, and when detecting that the first device fails, continuing to process, by the second device according to the topology information, the driver, and the processing information, the transaction that is about the access of the host to the PCIe device and is being processed when a first device fails.


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