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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10090507 B1

PDFFull Text
Date of Patent:
Oct. 02, 2018

Filed:

Mar. 05, 2014

Secondary battery-mounted circuit chip and manufacturing method thereof

Applicants:

Kabushiki Kaisha Nihon Micronics, Musashino-shi, Tokyo, JP;

Guala Technology Co., Ltd., Kobe-shi, Hyogo, JP;

Inventors:

Kazuyuki Tsunokuni, Musashino, JP;

Tatsuo Inoue, Musashino, JP;

Kiyoyasu Hiwada, Musashino, JP;

Takashi Tonokawa, Musashino, JP;

Akira Nakazawa, Kobe, JP;

Assignees:

KABUSHIKI KAISHA NIHON MICRONICS, Tokyo, JP;

GUALA TECHNOLOGY CO., LTD., Kobe, JP;

Attorney:

Oliff PLC

Primary Examiner:

Jacob B Marks

Int. Cl.
CPC ...
H01M 4/00 (2006.01); H01M 2/34 (2006.01); H02S 50/00 (2014.01); H01M 10/42 (2006.01); H01M 10/04 (2006.01); H01M 10/0525 (2010.01); H01M 4/04 (2006.01); H01M 4/139 (2010.01); H01M 4/48 (2010.01); H01M 4/66 (2006.01); H01M 10/052 (2010.01); H01M 10/0585 (2010.01); H01M 10/44 (2006.01); H01M 6/40 (2006.01);
U.S. Cl.
CPC ...
H01M 2/345 (2013.01); H01M 10/0436 (2013.01); H01M 10/0463 (2013.01); H01M 10/0525 (2013.01); H01M 10/425 (2013.01); H02S 50/00 (2013.01); H01L 2224/48247 (2013.01); H01M 4/0426 (2013.01); H01M 4/139 (2013.01); H01M 4/483 (2013.01); H01M 4/661 (2013.01); H01M 6/40 (2013.01); H01M 10/049 (2013.01); H01M 10/052 (2013.01); H01M 10/0585 (2013.01); H01M 10/446 (2013.01); H01M 2200/20 (2013.01); H01M 2220/30 (2013.01);
Abstract

A secondary battery-mounted circuit chip wherein secondary battery is directly fabricated on opposed surface of formed circuit into an integrated structure of the secondary battery and circuit, and a manufacturing method thereof. Secondary battery-mounted circuit chip is configured such that secondary battery is directly fabricated in region corresponding to circuit into integrated structure of secondary battery and circuit. The chip is secondary battery-mounted circuit chip wherein secondary battery is formed on surface opposing a circuit region fabricated on wafer. Secondary battery and circuit are formed into integrated structure by forming the uppermost part of circuit having multilayer wiring into secondary battery structure on upper part of circuit surface subjected to passivation, forming secondary battery directly stacked by making uppermost wiring layer of multilayer wiring part of circuit in a surface structure to be used in common, or forming secondary battery on rear surface of substrate having the circuit formed thereon.

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