The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 02, 2018
Filed:
Jun. 01, 2016
Applicant:
Lumileds Llc, San Jose, CA (US);
Inventors:
Jonathan J. Wierer, Pleasanton, CA (US);
John E. Epler, San Jose, CA (US);
Assignee:
LUMILEDS LLC, San Jose, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 33/12 (2010.01); H01L 33/00 (2010.01); H01L 33/16 (2010.01); H01L 33/06 (2010.01); H01L 33/24 (2010.01); H01L 33/32 (2010.01); H01L 21/02 (2006.01); H01L 33/38 (2010.01);
U.S. Cl.
CPC ...
H01L 33/12 (2013.01); H01L 21/0254 (2013.01); H01L 21/02458 (2013.01); H01L 21/02513 (2013.01); H01L 33/007 (2013.01); H01L 33/0025 (2013.01); H01L 33/0075 (2013.01); H01L 33/0079 (2013.01); H01L 33/06 (2013.01); H01L 33/16 (2013.01); H01L 33/24 (2013.01); H01L 33/32 (2013.01); H01L 21/0237 (2013.01); H01L 33/382 (2013.01); H01L 2924/0002 (2013.01);
Abstract
A semiconductor structure comprising a III-nitride light emitting layer disposed between an n-type region and a p-type region is grown over a porous III-nitride region. A III-nitride layer comprising InN is disposed between the light emitting layer and the porous III-nitride region. Since the III-nitride layer comprising InN is grown on the porous region, the III-nitride layer comprising InN may be at least partially relaxed, i.e. the III-nitride layer comprising InN may have an in-plane lattice constant larger than an in-plane lattice constant of a conventional GaN layer grown on sapphire.