The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 02, 2018

Filed:

May. 23, 2016
Applicant:

National Cheng Kung University, Tainan, TW;

Inventors:

Lih-Yih Chiou, Tainan, TW;

Tsai-Kan Chien, Tainan, TW;

Chang-Chia Lee, Tainan, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/00 (2006.01); G06F 11/14 (2006.01); G06F 11/16 (2006.01); G06F 11/30 (2006.01); G06F 12/02 (2006.01); G11C 16/34 (2006.01); G11C 16/20 (2006.01); G11C 16/30 (2006.01);
U.S. Cl.
CPC ...
G06F 11/1441 (2013.01); G06F 11/167 (2013.01); G06F 11/3062 (2013.01); G06F 12/0238 (2013.01); G11C 16/20 (2013.01); G11C 16/3404 (2013.01); G06F 2212/202 (2013.01); G11C 16/30 (2013.01);
Abstract

An energy-efficient nonvolatile microprocessor includes a processing core, a nonvolatile flip-flop array, a set of nonvolatile interconnections, and a store-enable register. When a power source is recovered to a stable state, the processing core determines whether data of nonvolatile registers is not transmitted before power-off. If yes, the processing core executes programmable recovery entry decision to avoid recovery failures for different applications. The processing core has plural system states divided into programmer visible states and programmer invisible states. The nonvolatile interconnections are connected between the processing core and the nonvolatile flip-flop array. When the power source is unstable, the processing core only stores the programmer visible states into the nonvolatile flip-flop array and, at the same time, only stores the system states of the peripheral modules corresponding to the bits of the store-enable register that are set to be 'true' into the nonvolatile flip-flop array.


Find Patent Forward Citations

Loading…