The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 25, 2018

Filed:

Feb. 03, 2015
Applicant:

Zte Corporation, Shenzhen, Guangdong, CN;

Inventors:

Kexin Tang, Shenzhen, CN;

Xihua Fu, Shenzhen, CN;

Junhui Zhang, Shenzhen, CN;

Assignee:

ZTE Corporation, Shenzhen, Guangdong, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04J 3/06 (2006.01); H04L 12/403 (2006.01); H04L 12/915 (2013.01);
U.S. Cl.
CPC ...
H04J 3/0638 (2013.01); H04J 3/0647 (2013.01); H04L 12/403 (2013.01); H04L 47/785 (2013.01);
Abstract

A cross-domain clock synchronization method, device and system and a computer storage medium, which are applied to a cross-domain synchronization network. A Path Calculate Element (PCE) exchanges a clock synchronization type with a controller participating in clock synchronization path calculation to match the clock synchronization type supported by the PCE and the controller; the PCE acquires physical topological information of the cross-domain synchronization network; the PCE acquires synchronization information of synchronization nodes of the cross-domain synchronization network and/or hop number information between the synchronization nodes; the PCE calculates a clock synchronization path of the cross-domain synchronization network according to the physical topological information as well as the synchronization information and/or the hop number information; and the PCE sends the clock synchronization path to the controller according to the physical topological information to enable the controller to send a clock synchronization instruction to synchronization nodes on the clock synchronization path.


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