The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 25, 2018

Filed:

Sep. 15, 2017
Applicants:

Adam Watkins, Carbondale, IL (US);

Spyros Tragoudas, Carbondale, IL (US);

Inventors:

Adam Watkins, Carbondale, IL (US);

Spyros Tragoudas, Carbondale, IL (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 3/037 (2006.01); H03K 19/08 (2006.01);
U.S. Cl.
CPC ...
H03K 3/0375 (2013.01); H03K 19/08 (2013.01);
Abstract

Disclosed are a latch circuit and method for preventing double node upsets (DNUs). A first, second, and third storage circuit, each comprising four inputs and an output, are electrically interconnected with a first and second three-input c-element circuit, each comprising three inputs and an output, and a two-input c-element circuit comprising two inputs and an output. The output of the first storage circuit is connected to a first input of the first three-input c-element circuit, a first input of the third storage circuit and a third input of the second storage circuit. The output of the second storage circuit is connected to a second input of the first three-input c-element circuit, a first input of the two-input c-element circuit, and a second input of the second three-input c-element circuit. The output of the third storage circuit is connected to a second input of the two-input c-element circuit, a third input of the first three-input c-element circuit and a third input of the second three-input c-element circuit.


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