The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 25, 2018

Filed:

Aug. 18, 2016
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-Do, KR;

Inventors:

Min-Seok Oh, Osan-si, KR;

Sang-Joo Lee, Seongnam-si, KR;

Tae-Hoon Kim, Daejeon, KR;

Moo-Sup Lim, Yongin-si, KR;

Assignee:

SAMSUNG ELECTRONICS CO., LTD., Suwon-si, Gyeonggi-Do, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/146 (2006.01); H01L 31/0288 (2006.01);
U.S. Cl.
CPC ...
H01L 27/14641 (2013.01); H01L 27/1461 (2013.01); H01L 27/1463 (2013.01); H01L 27/14603 (2013.01); H01L 27/14609 (2013.01); H01L 27/14614 (2013.01); H01L 27/14643 (2013.01); H01L 27/14654 (2013.01); H01L 27/14656 (2013.01); H01L 31/0288 (2013.01);
Abstract

A shared pixel includes a plurality of photo diode regions, a shared floating diffusion region, a plurality of transfer gates and a blooming layer. Each of the photo diode regions generates photo-charges in response to incident light. The photo diode regions are formed in a semiconductor substrate. The shared floating diffusion region is shared by the plurality of photo diode regions. The shared floating diffusion region is separated from the plurality of photo diode regions in the semiconductor substrate. Each of the transfer gates transfers the photo-charges of a corresponding photo diode region to the shared floating diffusion region in response to a transfer control signal. The blooming layer transfers overflow photo-charges to a power supply voltage node.


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