The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 25, 2018

Filed:

Dec. 21, 2017
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Ki Hwan Kim, Suwon-si, KR;

Gi Gwan Park, Seoul, KR;

Jung Gun You, Hwaseong-si, KR;

Dong Suk Shin, Ansan-si, KR;

Hyun Yul Choi, Yongin-si, KR;

Assignee:

SAMSUNG ELECTRONICS CO., LTD., Samsung-ro, Yeongtong-gu, Suwon-si, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/00 (2006.01); H01L 27/092 (2006.01); H01L 21/84 (2006.01); H01L 27/088 (2006.01); H01L 27/12 (2006.01); H01L 29/06 (2006.01); H01L 29/08 (2006.01); H01L 29/165 (2006.01); H01L 29/167 (2006.01); H01L 29/417 (2006.01); H01L 29/45 (2006.01); H01L 29/78 (2006.01); H01L 27/02 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0924 (2013.01); H01L 21/845 (2013.01); H01L 27/0207 (2013.01); H01L 27/0886 (2013.01); H01L 27/1211 (2013.01); H01L 29/0649 (2013.01); H01L 29/0847 (2013.01); H01L 29/165 (2013.01); H01L 29/167 (2013.01); H01L 29/41766 (2013.01); H01L 29/41783 (2013.01); H01L 29/41791 (2013.01); H01L 29/456 (2013.01); H01L 29/785 (2013.01); H01L 29/7848 (2013.01);
Abstract

The semiconductor device includes a substrate comprising first and second regions, in the first region, first and second gate electrodes formed parallel to each other on the substrate, and being spaced apart from each other by a first distance, in the second region, third and fourth gate electrodes formed parallel to each other on the substrate, and being spaced apart from each other by a second distance which is greater than the first distance, in the first region, a first recess formed on the substrate between the first and second gate electrodes, in the second region, a second recess formed on the substrate between the third and fourth gate electrodes, a first epitaxial source/drain filling the first recess and a second epitaxial source/drain filling the second recess, wherein an uppermost portion of an upper surface of the first epitaxial source/drain is higher than an uppermost portion of an upper surface of the second epitaxial source/drain.


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