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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10083918 B1

PDFFull Text
Date of Patent:
Sep. 25, 2018

Filed:

Sep. 06, 2017

Manufacturing method of semiconductor device

Applicant:

Toyoda Gosei Co., Ltd., Kiyosu-shi, JP;

Inventors:

Takahiro Fujii, Kiyosu, JP;

Masayoshi Kosaki, Kiyosu, JP;

Takaki Niwa, Kiyosu, JP;

Assignee:

TOYODA GOSEI CO., LTD., Kiyosu-Shi, Aichi-Ken, JP;

Attorney:

McGinn IP Law Group, PLLC.

Primary Examiner:

Marvin Payen

Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 21/265 (2006.01); H01L 21/266 (2006.01); H01L 21/324 (2006.01); H01L 29/20 (2006.01); H01L 29/267 (2006.01); H01L 29/423 (2006.01); H01L 29/66 (2006.01); H01L 21/02 (2006.01); H01L 29/45 (2006.01);
U.S. Cl.
CPC ...
H01L 23/562 (2013.01); H01L 21/0254 (2013.01); H01L 21/266 (2013.01); H01L 21/26546 (2013.01); H01L 21/3245 (2013.01); H01L 29/2003 (2013.01); H01L 29/267 (2013.01); H01L 29/4236 (2013.01); H01L 29/66522 (2013.01); H01L 29/66666 (2013.01); H01L 21/0228 (2013.01); H01L 21/0262 (2013.01); H01L 21/02178 (2013.01); H01L 21/02189 (2013.01); H01L 29/42376 (2013.01); H01L 29/452 (2013.01);
Abstract

There is provided a manufacturing method of a semiconductor device. The manufacturing method of the semiconductor device comprises: forming at least part of a cap layer that is mainly composed of a nitride, on a semiconductor layer that is mainly composed of a group III nitride semiconductor; implanting a p-type impurity into the semiconductor layer with at least part of the cap layer formed thereon, by ion implantation; forming a block layer having a larger coefficient of thermal expansion than a coefficient of thermal expansion of the cap layer, as a surface layer on the cap layer; and heating the semiconductor layer with the block layer as the surface layer, to activate the p-type impurity.

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