The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 25, 2018
Filed:
Oct. 11, 2017
Integrated Device Technology, Inc., San Jose, CA (US);
David Chang, Santa Clara, CA (US);
Xudong Shi, San Jose, CA (US);
INTEGRATED DEVICE TECHNOLOGY, INC., San Jose, CA (US);
Abstract
An apparatus comprising an open loop circuit and a delay circuit. The open loop circuit may be configured to generate an in-phase clock signal by performing a phase alignment in response to (i) a clean version of a system clock and (ii) a delayed version of a strobe signal. The delay circuit may be configured to (i) generate the delayed version of the strobe signal in response to (a) the strobe signal received from a memory interface and (b) a delay amount received from a calibration circuit and (ii) adjust a delay of transferring a data signal through the apparatus in response to (a) the delay amount and (b) the in-phase clock signal. The data signal may be received from the memory interface. The delay of transferring the data signal may be implemented to keep a latency of a data transfer within a pre-defined range.