The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 18, 2018
Filed:
Jun. 23, 2017
SK Hynix Inc., Icheon, KR;
Joong Sik Kim, Yongin, KR;
SK HYNIX INC., Icheon, KR;
Abstract
Disclosed is a method of manufacturing a nonvolatile memory device. In the method, a stacked structure is formed on a conductive substrate structure. The stacked structure includes at least one interlayer insulating layer and at least one sacrificial layer alternately stacked with the at least one interlayer insulating layer. A first trench is formed to extend through the stacked structure and to expose the conductive substrate structure. A first gate electrode layer, a dielectric structure, and a channel layer are formed on a side wall of the first trench, the dielectric structure including a ferroelectric layer. At least one recess is formed to expose a side wall of the first gate electrode layer by removing the at least one sacrificial layer. At least one second gate electrode layer is formed by filling the at least one recess with a conductive layer.