The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 18, 2018
Filed:
Jul. 27, 2016
Applicant:
Renesas Electronics Corporation, Tokyo, JP;
Inventors:
Hiroyuki Iwata, Tokyo, JP;
Jun Matsushima, Tokyo, JP;
Assignee:
Renesas Electronics Corporation, Tokyo, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/3177 (2006.01); G01R 31/317 (2006.01); G01R 31/3183 (2006.01); G01R 31/3181 (2006.01);
U.S. Cl.
CPC ...
G01R 31/3177 (2013.01); G01R 31/3183 (2013.01); G01R 31/31723 (2013.01); G01R 31/31727 (2013.01); G01R 31/31813 (2013.01);
Abstract
It is possible to reduce the number of test point circuits to be inserted necessary to accomplish a target fault coverage, to suppress an increase in an area overhead, and to reduce a test time. A test point circuit according to an embodiment constitutes a scan chain, and captures, in one capture operation period of a clock sequential test, a first operation result in a second capture clock that comes after a first capture clock, the first operation result having been captured by a test point circuit at a previous stage or a last stage of the scan chain in the first capture clock.