The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 11, 2018
Filed:
Nov. 30, 2016
Applicant:
Integrated Device Technology, Inc., San Jose, CA (US);
Inventors:
Silvana Rodrigues, Ottawa, CA;
Michael Rupert, Ottawa, CA;
Zaher Baidas, Kanata, CA;
Leon Goldin, Otttawa, CA;
Assignee:
INTEGRATED DEVICE TECHNOLOGY, INC., San Jose, CA (US);
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04L 7/00 (2006.01); H04L 7/033 (2006.01); H04L 25/49 (2006.01); H04L 12/935 (2013.01);
U.S. Cl.
CPC ...
H04L 7/033 (2013.01); H04L 25/4902 (2013.01); H04L 49/30 (2013.01);
Abstract
A system and method for clock phase alignment at a plurality of line cards over a backplane of a communication system. Phase adjustments are continually made for the clock signals at the line cards by dynamically measuring the propagation delay between the timing device and each of the plurality of line cards and continuously communicating the appropriate phase adjustment to each of the plurality of line cards.