The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 11, 2018

Filed:

Sep. 30, 2016
Applicant:

Arm Limited, Cambridge, GB;

Inventors:

Vivek Nautiyal, Milpitas, CA (US);

Jitendra Dasani, Cupertino, CA (US);

Fakhruddin Ali Bohra, Austin, TX (US);

Satinderjit Singh, Fremont, CA (US);

Shri Sagar Dwivedi, San Jose, CA (US);

Assignee:

ARM Limited, Cambridge, GB;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/22 (2006.01); G11C 7/12 (2006.01); G11C 5/14 (2006.01); G11C 8/08 (2006.01);
U.S. Cl.
CPC ...
G11C 7/12 (2013.01); G11C 5/147 (2013.01); G11C 7/22 (2013.01); G11C 7/227 (2013.01); G11C 8/08 (2013.01);
Abstract

Various implementations described herein may refer to and may be directed to an integrated circuit using shaping and timing circuitries. In one implementation, an integrated circuit may include memory that is accessed based on a voltage level on a first control line, and may include a control driver circuitry coupled to the first and a second control line that drives a first and a second control signal toward first or second voltage levels. The integrated circuit may include a shaper circuitry coupled to the control lines that includes a first clamping transistor that couples the first control line to a timed supply node in response to the driving of the second control signal toward the first voltage. The integrated circuit may include a timing circuitry coupled to the first shaper circuitry that includes a header transistor that couples the timed supply node to a voltage supply source.


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