The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 11, 2018

Filed:

May. 08, 2017
Applicant:

Altera Corporation, San Jose, CA (US);

Inventors:

Bruce B. Pedersen, Sunnyvale, CA (US);

Dirk A. Reese, Campbell, CA (US);

Assignee:

Altera Corporation, San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 7/38 (2006.01); G06F 21/79 (2013.01); G11C 11/419 (2006.01); G11C 7/20 (2006.01); G06F 21/76 (2013.01);
U.S. Cl.
CPC ...
G06F 21/79 (2013.01); G06F 21/76 (2013.01); G11C 7/20 (2013.01); G11C 11/419 (2013.01);
Abstract

Methods, circuits, and systems for preventing data remanence in memory systems are provided. Original data is stored in a first memory, which may be a static random access memory (SRAM). Data is additionally stored in a second memory. Data in the first memory is periodically inverted, preventing data remanence in the first memory. The data in the second memory is periodically inverted concurrently with the data in the first memory. The data in the second memory is used to keep track of the inversion state of the data in the first memory. The original data in the first memory can be reconstructed performing a logical exclusive-OR operation between the data in the first memory and the data in the second memory.


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