The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 11, 2018

Filed:

Jun. 16, 2015
Applicant:

Microsoft Technology Licensing, Llc, Redmond, WA (US);

Inventors:

Nathan Trent Josephsen, Halethorpe, MD (US);

Steven Brian Shauck, Crofton, MD (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 7/508 (2006.01); G06F 7/501 (2006.01);
U.S. Cl.
CPC ...
G06F 7/508 (2013.01); G06F 7/501 (2013.01);
Abstract

Embodiments described herein are directed to mixed-radix carry-lookahead adders and methods performed thereby. The mixed-radix carry-lookahead adder includes an multiple carry-lookahead stages, where each stage may be of a different radix. Each stage operates on input bits, creating and implementing propagate and generate signals for each bit. The carry-lookahead stages also compute an XOR of the inputs that is forwarded to a final carry-lookahead stage. The elements of the initial and subsequent carry-lookahead stages are arranged such that each of the propagate and generate output signals passes through a minimal number of passive transmission lines. The final stage of the mixed-radix carry-lookahead adder includes an XOR logic gate configured to receive the generate output from an intermediate carry-lookahead stage and XOR the generate output received from the intermediate carry-lookahead stage with the computed XOR signal forwarded from the initial carry-lookahead stage to produce a sum of the input bits.


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