The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 04, 2018

Filed:

Sep. 10, 2015
Applicant:

Carnegie Mellon University, a Pennsylvania Non-profit Corporation, Pittsburgh, PA (US);

Inventors:

Ronald DeShawn Blanton, Sewickley, PA (US);

Benjamin Niewenhuis, Richardson, TX (US);

Assignee:

CARNEGIE MELLON UNIVERSITY, Pittsburgh, PA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/30 (2006.01); H04L 9/32 (2006.01); G09C 1/00 (2006.01);
U.S. Cl.
CPC ...
H04L 9/3278 (2013.01); G09C 1/00 (2013.01);
Abstract

According to embodiments of the present invention are systems and methods for using scan chains for the creation of unique physically uncloneable function (PUF). In particular, the present invention uses existing circuitry on an integrated circuit and the internal-scan or boundary-scan register to create a unique identifier for each integrated chip. The unique nature of the scan chains results from the inherent variability of the manufacturing process.


Find Patent Forward Citations

Blanton, Ronald. (2018). Methods and systems for achieving system-level counterfeit protection in integrated chips (U.S. Patent No. 10069635). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10069635

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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