The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 04, 2018

Filed:

Dec. 12, 2016
Applicant:

Globalfoundries Inc., Grand Cayman, KY;

Inventors:

Christian Haufe, Dresden, DE;

Ingolf Lorenz, Ottendorf-Okrilla, DE;

Michael Zier, Dresden, DE;

Ulrich Gerhard Hensel, Radeberg, DE;

Navneet Jain, Milpitas, CA (US);

Assignee:

GLOBALFOUNDRIES Inc., Grand Cayman, KY;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/12 (2006.01); H01L 29/49 (2006.01); H01L 21/84 (2006.01); H01L 29/06 (2006.01);
U.S. Cl.
CPC ...
H01L 27/1203 (2013.01); H01L 21/84 (2013.01); H01L 29/0696 (2013.01); H01L 29/4916 (2013.01);
Abstract

An integrated circuit is provided including a semiconductor bulk substrate, a buried oxide layer formed on the semiconductor bulk substrate, a plurality of cells, each cell having a transistor device, formed over the buried oxide layer, a plurality of gate electrode lines running through the cells and providing gate electrodes for the transistor devices of the cells, and a plurality of tap cells configured for electrically contacting the semiconductor bulk substrate and arranged at positions different from positions below or above the plurality of cells having the transistor devices.


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