The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 04, 2018

Filed:

Jul. 28, 2017
Applicant:

SK Hynix Inc., Icheon-si, Gyeonggi-do, KR;

Inventors:

Kihun Kwon, Yongin-si, KR;

Jaeil Kim, Yongin-si, KR;

Assignee:

SK hynix Inc., Icheon-si, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/40 (2006.01); G11C 11/4074 (2006.01); G11C 11/406 (2006.01); G11C 11/4076 (2006.01); G11C 11/4093 (2006.01); G11C 7/22 (2006.01); G11C 29/02 (2006.01);
U.S. Cl.
CPC ...
G11C 11/4074 (2013.01); G11C 7/22 (2013.01); G11C 11/406 (2013.01); G11C 11/4076 (2013.01); G11C 11/4093 (2013.01); G11C 29/023 (2013.01); G11C 2207/2227 (2013.01); G11C 2211/4067 (2013.01);
Abstract

An integrated circuit may include a first semiconductor device and a second semiconductor device. The first semiconductor device may be configured to output a chip section signal and command/address signals. The second semiconductor device may be configured to enter a power-down operation based on the chip section signal and the command/address signals. The second semiconductor device may be configured to interrupt input of a first group of the command/address signals during the power-down operation. The second semiconductor device may be configured to selectively perform an on-die termination (ODT) operation according to a level combination of a second group of the command/address signals.


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